This invention relates, in general, to electronic circuit devices and, more specifically, to subranging analog-to-digital converters.
There is always a need for higher speed and higher accuracy analog-to-digital converters and there is usually a continuing design effort being undertaken to achieve these goals. Several different techniques have evolved which have exhibited good economic and performance characteristics for analog-to-digital converters. A popular technique employs the use of digitally corrected subranging converters. Background information on such converters is contained in various publications, such as in Pratt, W.J.: High Linearity and Video Speed Come Together In A-D Converters, "Electronics," McGraw-Hill, Inc., Oct. 9, 1980.
Although analog-to-digital converters constructed according to the above reference are useful in certain applications, limitations on the speed and accuracy of the required digital-to-analog converter used in the subranging system has slowed the rate of advancement of the speed and resolution of the overall subranging analog-to-digital architecture. Therefore, various attempts to provide analog-to-digital converters using the basic subranging architecture and improving the performance thereof have been proposed by others.
One method of improving the performance of conventional subranging A/D converters is disclosed in U.S. Pat. No. 4,612,533 issued Sept. 16, 1986, which discloses an invention made by one of the inventors of the present application and is assigned to the Secretary of the Air Force. The system disclosed therein uses two high speed, low accuracy, digital-to-analog converters in the analog-to-digital conversion system. One of the digital-to-analog converters is used to provide a correction to the other digital-to-analog converter. This correction is made in the analog stages of the system which, because of its analog nature, does not readily permit the implementation of that invention with CMOS, gate array, or VHSIC technology.
Therefore, it is desirable, and it is an object of this invention, to provide a high speed analog-to-digital converter which requires a minimum of high speed, high accuracy analog components, thereby allowing implementation with the newest high speed, low power digital techniques.